Wait States

The speed of the processor will in general be significantly higher that the speed of the memorychips or -modules. If memory can't react fast enough, the processor will have to wait for one or more clockcycles. These extra cycles are called Wait States. With some calculating, it is possible to find the optimal (minimal) number of wait states for your system. The following calculator can help you with that problem.

CPU speed (external/FSB) MHz
Period of 2 CPU cycles ns
Delay(CPU->memory, chipset, memory->CPU) ns
Memory reaction time ns
+ 1 Wait State ns
+ 2 Wait States ns
+ 3 Wait States ns
+ 4 Wait States ns
+ 5 Wait States ns
+ 6 Wait States ns
The reaction time of memory at 0 Wait States can be calculated by substracting the delays (from CPU to memory, inside the chipset and from memory to the CPU) from the time it takes for 2 CPU cycles to complete. In order to operate with 0 Wait States, the value in nanoseconds should be equal to or lower than the calculated time.

Example:In a system, running at 33 MHz, 60 ns memory is used. Using the calculator above, and assuming a delay of 39 ns, you will see that you have to add 2 Wait States for optimal performance.

What delays should you use? Delays that occur in a system depend on the type of CPU and the type of chipset. There are three types of delays: from the CPU to memory, inside the chipset, and from memory to the CPU. The following table will give you average values.
286 8 MHz 94 ns
10 MHz 67 ns
12 MHz 61 ns
16 MHz 58 ns
20 MHz 55 ns
25 MHz 52 ns
386DX/SX 12 MHz 75 ns
16 MHz 69 ns
20 MHz 63 ns
25 MHz 48 ns
33 MHz 44 ns
40 MHz 41 ns
486DX/SX/DX2 16 MHz 56 ns
20 MHz 49 ns
25 MHz 44 ns
33 MHz 41 ns
50 MHz 36 ns
486 Overdrive 16 MHz 56 ns
20 MHz 49 ns
25 MHz 44 ns
33 MHz 39 ns
486DX4 25 MHz 44 ns
33 MHz 39 ns
50 MHz 36 ns
Pentium 60 MHz 28 ns
66 MHz 27 ns
75 MHz 26 ns
90 MHz 25 ns
100 MHz 24 ns
120 MHz 23 ns
133 MHz 22 ns
166 MHz 20 ns